During the SPIE Advanced Lithography + Patterning conference, Applied Materials, Inc. introduced a portfolio of products and solutions designed to address the patterning requirements of chips in the “angstrom era.” As chipmakers transition to process nodes at 2nm and below, they increasingly benefit from new materials engineering and metrology techniques that help overcome EUV and High-NA EUV patterning challenges, including line edge roughness, tip-to-tip spacing limitations, bridge defects ...